Job Description

ASIC Physical Design and Timing Engineer (Finance) ASIC Physical Design and Timing Engineer (Finance) NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities which are hard to solve, that only we can pursue, and that matter to the world. This is our life's work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of something great, join us today! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing! More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities which are hard to tackle, that only we can pursue, and that matter to the world. This is our life's work, to amplify human inventiveness and intelligence. What you'll be doing: Drive Physical Design and timing analysis and closure of NVIDIA's GPUs, CPUs, DPUs and SoCs at block level, cluster level, and/or full chip level. Help in driving frontend and backend implementation including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and ECO implementation. Work in a cross-functional environment interacting with multiple teams. Apply knowledge and experience to improve timing convergence flows working with the methodology teams. What we need to see: BS (or equivalent experience) in Electrical or Computer Engineering with 2+ years experience or MS (or equivalent experience) Knowledge of Static Timing Analysis (STA) Knowledge of physical design and optimization e.g., synthesis, floorplanning, placement, cts, routing, power, etc. Hands-on experience with industry standard EDA tools. Ways to stand out from the crowd: Industry experience in timing convergence for ASICs, CPUs, GPUs or Network processors. Knowledge of deep sub-micron process nodes. Proficiency in AI/LLM and programming languages. NVIDIA is widely considered to be the leader of AI computing, and one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 108,000 USD - 184,000 USD. You will also be eligible for equity and benefits . Applications for this job will be accepted at least until August 19, 2025. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. #J-18808-Ljbffr Nvidia Corporation in

Job Tags

Similar Jobs