Job Description: Physical Design Engineer – Sunnyvale, CA (Full-Time Only)
We are seeking an experienced Physical Design Engineer to join our team in Sunnyvale, CA . This role focuses on the backend VLSI design of high-performance ASICs, SoCs, and custom silicon chips . The candidate should have expertise in floorplanning, placement, clock tree synthesis (CTS), routing, timing closure, and sign-off verification . Strong scripting skills and hands-on experience with EDA tools, silicon validation, and embedded debugging are essential.
Key Requirements & Must-Have Skills
✅ Experience : 5–15 years (recent 3–5 years hands-on experience is a must)
✅ Silicon Validation : Pre and post-silicon validation experience is mandatory
✅ Firmware Development : Hands-on experience with embedded systems and debugging
✅ Programming : Strong C/C++ , Intermediate Python , assembly-level debugging
✅ Hardware Emulation Tools : Experience with Zebu, HAPS (mandatory)
✅ Debugging & Validation Tools : Lauterbach, JTAG, I3C protocol
✅ Board Bring-Up : Experience in board bring-up and working with hardware teams
✅ SOC-Level Validation : Expertise in validating System on Chip (SoC) designs
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